Experienced Verification Team Leader – FPGA/ASIC #1294
#1294
R&D
, RAD Headquarters (Tel-Aviv)
Overview
Lead verification for advanced ASIC/FPGA designs in a top-tier R&D team developing high-performance network interface solutions and customer-focused hardware.
Location: Tel Aviv office or our Be’er Sheva office, which is located next to the train station
Responsibilities:
- Drive verification of complex, high-speed ASIC/FPGA designs
- Define and implement advanced verification methodologies
- Collaborate with architecture, software, and validation teams
- Mentor engineers and promote technical excellence
- Work with technologies like high-speed interfaces, network processors, and SoCs
Requirements:
- B.Sc. in Computer Science or Electrical Engineering
- 7+ years of hands-on verification experience
- Proven end-to-end ASIC flow experience (design to tapeout)
- Strong teamwork and communication skills
Advantage:
- Leadership or technical management experience
- Ability to guide teams toward successful delivery
Bonus Skills:
- Python/Bash scripting
- SoC integration
- Formal verification
- Palladium, GLS