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ASIC/FPGA Verification Engineer #1310

#1310
R&D
, RAD Negev (Be'er Sheva)

Overview

We’re hiring an experienced verification engineer to join our team developing advanced telecommunications ASIC/FPGA products. You will join RAD’s family, as part of our team in Beer-Sheva.

 

Responsibilities:

  • Build and maintain verification environments (SystemVerilog/UVM or Specman)
  • Develop test plans and run constrained-random & directed tests
  • Debug, analyze coverage, and work closely with design teams
  • Contribute to methodology and process improvements

Requirements:

  • BSc/MSc in EE/CE or related field
  • 5+ years of ASIC/FPGA verification experience
  • Strong in SV/UVM or Specman
  • Scripting (Python/Bash), Linux
  • Great debugging and teamwork skills

Advantage:

  • Telecom protocols knowledge
  • ASIC/FPGA design background
  • Experience in FPGA prototyping or hardware validation